ConfigCon Set to Address New Opportunities Emerging in Communications and Consumer Electronics

Semico : Tthe use of Configurable 32-bit CPU cores is going to be the next major driver in several of the sub-families in the ASIC market, such as the System-on-a-Chip (SoC), the Structured ASIC, the Application Specific Standard Product (ASSPs) and Field Programmable Gate Arrays (FPGAs).

Silicon that includes 32-bit CPU cores in general will increase to 3,117.7M units by 2009, with a CAGR of 12.8%. However, of this total, silicon that uses configurable 32-bit CPU cores will reach 605.8M units by 2009, a CAGR of 45.9%.

The 32-bit CPU core market will segment between the different types of semiconductor devices that can use CPU cores. ASSPs will be the product family to lead in revenues with over $11.6B by 2009, a 17.5% CAGR. Performance SoCs follow closely behind ASSPs in revenues shipped.

The reason for this dramatic increase in configurable CPU core usage is the added flexibility a configurable CPU core brings to the designer in crafting his final silicon solution. Now, the instruction set of the CPU core can be tailored to fit the end application much more closely. In effect, designers can now remove unnecessary gates by combining instructions to remove software bottlenecks. This can have wide implications on end system performance, power consumption, speed and die area.

An additional benefit from the use of configurable CPU cores is starting to become more prominent in the thinking of system architects and designers, namely security.

One of the realities of the high tech market is reverse engineering. Companies need to protect their life blood, namely their intellectual property. Chips can be de-capped and the circuit design examined. Software can be analyzed and copied. The instruction set extensions of configurable cores are more of a hybrid. The circuit design includes additional transistors generated from EDA tools. These circuits are the result of customized code. It would be very difficult for someone to determine the circuit design and the associated code. Configurable cores add a level of security to protect IP, making it substantially more difficult to de-construct an algorithm.

A further finding of the study shows that the number of CPU cores being utilized in ASICs today is rising as designers seek to deliver the processing power necessary by new emerging applications. The tradeoff between using multiple CPU cores and performance requirements is a favorable one. In reality it costs relatively little to embed additional CPU cores in terms of die area and overall system cost. This reinforces the trend towards configurability since designers are now not only able to use multiple CPU cores in a design, they can tailor the instruction set of each one to directly fit the needs of the application. More: Configurable CPU core

Publ 20060131